Direct Memory Access Controller: The Direct Memory Access or DMA mode of data transfer is the fastest amongst all the modes of data transfer. In this mode, the device may transfer data directly to/from memory without any interference from the CPU.

 The device requests the CPU (through a DMA controller) to hold its data, address and control bus, so that the device may transfer data directly to/from memory. The DMA data transfer is initiated only after receiving HLDA signal from the CPU. 

Intel’s 8257 is a four channel DMA controller designed to be interfaced with their family of microprocessors. The 8257, on behalf of the devices, requests the CPU for bus access using local bus request input i.e. HOLD in minimum mode. In maximum mode of the microprocessor RQ/GT pin is used as bus request input. On receiving the HLDA signal (in minimum mode) or RQ/GT signal (in maximum mode) from the CPU, the requesting devices gets the access of the bus, and it completes the required number of DMA cycles for the data transfer and then hands over the control of the bus back to the CPU.

Operation of DMA: The interface sends the DMA controller a request for DMA service.

A Bus request is made to the HOLD pin (active High) on the 8086 microprocessor and the controller gains control of the bus.

A Bus grant is returned to the DMA controller from the Hold Acknowledge (HLDA) pin (active High) on the 8086 microprocessor.

  1. The  DMA controller places contents of the address register onto the address bus.
  2. The controller sends the interface a DMA acknowledgment, which tells the interface to put data on the data bus. (For an output it signals the interface to latch the next data placed on the bus).
  3. The data byte is transferred to the memory location indicated by the address bus.
  4. The interface latches the data.
  5. The Bus request is dropped, the HOLD pin goes Low, and the controller relinquishes the bus.
  6. The Bus grant from the 8086 microprocessor is dropped and the HLDA pin goes Low.
  7. The address register is incremented by 1.
  8. The byte count is decremented by 1.
  9. If the byte count is non-zero, return to step 1, otherwise stop.